This invention relates generally to electrical oscillator and filter circuits, and more particularly the invention relates to a phase locked oscillator and an active filter for use therein.
Voltage controlled oscillators operated in a phase locked loop in which an error signal is generated from a phase comparison of a reference signal and the oscillator output signal are well known. Typically, the error signal from a phase detector is applied to a second order loop filter circuit which generates a control voltage including one component which is directly related to the instantaneous value of the error signal and a second component which is related to the integral of the error signal. The first component is responsible for short term frequency or phase changes and is the primary factor determining the damping coefficient of the phase locked loop. The second component is responsible for long term frequency changes of the voltage controlled oscillator and is the primary factor determining the band-width of the phase locked loop.
The conventional filter using an operational amplifier works well with an analog phase detector since the phase detector output voltage is continually proportional to the phase error and rate of change of the output voltage is limited by the loop bandwidth. However, difficulties arise with a digital phase comparator since the output is a series of pulses with pulse duration being proportional to phase error. For the filter output to follow the pulses, a much higher filter slew rate must be available than that which would be required by loop bandwidth alone. If the pulses from the digital phase comparator are slew rate limited, phase adjustments are reduced and severe underdamping in the phase lock loop will result. Other problems attendant with the use of a digital phase detector with a conventional filter are balance and stability of the filter output. Balance between the error signals generated by positive and negative phase errors is important due to the integrating function of the loop filter. Any imbalance is translated into steady state phase error. Stability can be a problem since high impedance digital outputs can couple with the parasitic and input capacitance of the amplifier to produce a pole within the compensated amplifier bandwidth and result in spurious oscillations.